Tim Fritzmann
Since 2022, Tim Fritzmann works as a Senior Software Engineer Cryptography at Infineon Technologies AG. During his PhD at the Technical University of Munich, he investigated efficient and secure hardware/software implementations for Post-Quantum Cryptography. In 2017, he obtained the master’s degree in Electrical Engineering at the Technical University of Munich. For his master’s thesis, he received the Walter Gademann award. In 2013, he obtained the bachelor’s degree in Electrical Engineering and worked then for two years as a hardware engineer at Thales in the field of electromagnetic compatibility (EMC).
Research Interests:
- Post-Quantum Cryptography / Lattice-Based Cryptography
- Secure and efficient HW/SW implementations
- Error-Correcting Codes
- RISC-V Co-Processor Design
- ASIC/FPGA Design
News and References
- Development of Post-Quantum Cryptography Chip with RISC-V Processor at Technical University of Munich. See press article here.
Video Post-Quantum Cryptography Accelerators
- The talk of this presentation was presented on Cryptographic Hardware and Embedded Systems (CHES 2020). It is also available on YouTube: Link
- The full session of Lattice-Based Cryptography is available on YouTube: Link
- A talk about masked hardware accelerators for lattice-based cryptography was presented at CHES 2022. The talk is available on YouTube: Link
Publications
2023
Oberhansl, Felix and Fritzmann, Tim and Roy, Debapriya Basu and Pöppelmann, Thomas and Sigl, Georg: Uniform instruction set extensions for multiplications in contemporary and post-quantum cryptography. Journal of Cryptographic Engineering, 2023. Link
2022
Karl, Patrick and Schupp Jonas and Fritzmann, Tim and Sigl, Georg: Post-Quantum Signatures on RISC-V with Hardware Acceleration. ACM Transactions on Embedded Computing Systems, 2022. Link
Karl, Patrick and Fritzmann, Tim, and Sigl, Georg: Hardware accelerated FrodoKEM on RISC-V. International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS). IEEE, 2022. Link
2021
Fritzmann, Tim and Van Beirendonck, Michiel and Roy, Debapriya Basu and Karl, Patrick and Schamberger, Thomas and Verbauwhede, Ingrid and Sigl, Georg: Masked Accelerators and Instruction Set Extensions for Post-Quantum Cryptography. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2022(1):414–460, Nov. 2021. Link
Fritzmann, Tim and Vith, Jonas and Flórez, Daniel and Sepúlveda, Johanna. Post-quantum cryptography for automotive systems. Microprocessors and Microsystems, 87(November 2021):1–8, Nov. 2021. Link
2020
Roy, Debapriya Basu and Fritzmann, Tim and Sigl, Georg: Efficient Hardware/Software Co-Design for Post-Quantum Crypto Algorithm SIKE on ARM and RISC-V based Microcontrollers. Proceedings of the 39th International Conference on Computer-Aided Design (ICCAD), 2020 (pp. 1-9). Link
Fritzmann, Tim and Sigl, Georg and Sepúlveda, Johanna: RISQ-V: Tightly Coupled RISC-V Accelerators for Post-Quantum Cryptography. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2020(4), 239-280. Link
Fritzmann, Tim and Sigl, Georg and Sepúlveda, Johanna: Extending the RISC-V Instruction Set for Hardware Acceleration of the Post-Quantum Scheme LAC. Design, Automation & Test in Europe (DATE), 2020, Grenoble, France. Link
Maringer, Georg and Fritzmann, Tim and Sepúlveda, Johanna: The Influence of LWE/RLWE Parameters on the Stochastic Dependence of Decryption Failures. International Conference on Information and Communications Security (ICICS), 2020, Copenhagen, Denmark. Link
Fritzmann, Tim and Vith, Jonas Vith and Sepúlveda, Johanna: Strengthening Post-Quantum Security for Automotive Systems. Euromicro Conference on Digital System Design (DSD), 2020, Kranj, Slovenia. Link
2019
Fritzmann, Tim and Vith, Jonas and Sepúlveda, Johanna: Post-Quantum Key Exchange Mechanism for Safety Critical Systems. escar Europe: embedded security in cars, 2019, Stuttgart, Germany. Link
Fritzmann, Tim and Sepúlveda, Johanna: Efficient and Flexible Low-Power NTT for Lattice-Based Cryptography. IEEE International Symposium on Hardware Oriented Security and Trust (HOST), 2019, Washington, D.C., USA. Link
Fritzmann, Tim and Sharif, Uzair and Müller-Gritschneder, Daniel and Reinbrecht, Cezar and Schlichtmann, Ulf and Sepúlveda, Johanna: Towards Reliable and Secure Post-Quantum Co-Processors based on RISC-V. Design, Automation & Test in Europe (DATE), 2019, Florence, Italy. Link
Fritzmann, Tim and Schamberger, Thomas and Frisch, Christoph and Braun, Konstantin and Maringer, Georg and Sepúlveda, Johanna: Efficient Hardware/Software Co-design for NTRU. VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms, Springer International Publishing, 2019. Link
2018
Braun, Konstantin and Fritzmann, Tim and Maringer, Georg and Schamberger, Thomas and Sepúlveda, Johanna: Secure and Compact Full NTRU Hardware Implementation. IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2018, Verona, Italy. Link
Fritzmann, Tim and Pöppelmann, Thomas and Sepúlveda, Johanna: Analysis of Error-Correcting Codes for Lattice-Based Key Exchange. Conference on Selected Areas in Cryptography (SAC), 2018, Calgary, Canada, 1-22. Link
Selected Talks
- 2023, Apr. 11: Dagstuhl Seminar (Secure and Efficient Post-Quantum Cryptography in Hardware and Software)
- 2022, Sept. 21: Conference on Cryptographic Hardware and Embedded Systems (Masked Accelerators and Instruction Set Extensions for Post-Quantum Cryptography)
- 2021, Sept. 28: Informatik 2021 (An ASIC Design for Hardware Acceleration of Post-Quantum Cryptography)
- 2020, Okt. 14: RISC-V Security Standing Committee Speaker Programm (Post-Quantum Instruction Set Extensions)
- 2020, Okt. 8: Workshop on RISC-V Activities (Instruction Set Extensions and Tightly Coupled RISC-V Accelerators for Post-Quantum Cryptography)
- 2020, Sep. 17: Conference on Cryptographic Hardware and Embedded Systems (RISQ-V: Tightly Coupled RISC-V Accelerators for Post-Quantum Cryptography)
- 2020, Aug. 27: Euromicro DSD/SEAA 2020 (Strengthening Post-Quantum Security for Automotive Systems)
- 2020, März 12: Design, Automation, and Test in Europe (DATE) (Extending the RISC-V Instruction Set for Hardware Acceleration of the PQ Scheme LAC)
- 2019, Nov. 17: Embedded Security in Cars, Stuttgart, Germany (Post-Quantum Key Exchange Mechanism for Safety Critical Systems)
- 2019, Mai 8: International Symposium on Hardware Oriented Security and Trust, Washington, USA (Efficient and Flexible Low-Power NTT for Lattice-Based Cryptography)
- 2019, Feb. 27: International Workshop on RISC-V Research Activities, Munich, Germany (Towards Reliable and Secure Post-Quantum Co-Processors based on RISC-V)
- 2018, Okt. 9: International Conference on Very Large Scale Integration, Verona, Italy (Secure and Compact Full NTRU Hardware Implementation)
- 2018, Aug. 16: Selected Areas in Cryptography, Calgary, Canada (Analysis of Error-Correcting Codes for Lattice-Based Key Exchange)
- 2018, Jun. 7: Crypto day at genua GmbH in Kirchheim, Germany (Error-Correcting Codes for Lattice-Based Key Exchange)